Vote qref in tcsr driver for glymur/mahua/hamoa/purwa - #869
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PR #869 — validate-patchPR: #869
Final Summary
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PR #869 — checker-log-analyzerPR: #869
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Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
PR #869 — validate-patchPR: #869
Final Summary
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PR #869 — checker-log-analyzerPR: #869
Detailed report: Full report
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Merge Check Failed: CR Not Eligible for Merge CR 4625592 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
Before XO refclk is distributed to PCIe/USB/eDP PHYs, it passes through a QREF block. QREF is powered by dedicated LDO rails, and the clkref_en register controls whether refclk is gated through to the PHY side. These clkref controls are different from typical GCC branch clocks: - only a single enable bit is present, without branch-style config bits - regulators must be voted before enable and unvoted after disable Model this as a dedicated clk_ref clock type with custom clk_ops instead of reusing struct clk_branch semantics. Also provide a common registration/probe API so the same clkref model can be reused regardless of where clkref_en registers are placed, e.g. TCSR on glymur and TLMM on SM8750. Link: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-3-776f2811b7af@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
…e to clk_ref helper Replace local clk_branch-based clkref definitions with descriptor-based registration via qcom_clk_ref_probe(). This keeps the glymur driver focused on clock metadata and reuses common runtime logic for regulator handling, enable/disable sequencing, and OF provider wiring. Link: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-4-776f2811b7af@oss.qualcomm.com/ Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Mahua is based on Glymur but uses a different QREF topology, requiring distinct regulator lists and clock descriptors for its PCIe clock references. Add mahua-specific regulator arrays and clk descriptor table, and use match_data to select the correct descriptor table per compatible string at probe time. Link: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-5-776f2811b7af@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
The QREF block supplies reference clocks to PCIe/USB/UFS PHYs and requires dedicated LDO supplies to operate. The digital control interface for QREF (clkref_en registers) resides in TCSR on x1e80100. Since QREF has no dedicated DT node of its own, these supply properties are placed in the TCSR node which acts as the control interface for QREF. Add a dedicated binding file for qcom,x1e80100-tcsr and document the supply properties. Link: https://lore.kernel.org/all/20260714-hamoa_tcsr_qref_0714_2-v1-1-13047922a376@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Replace local clk_branch-based clkref definitions with descriptor-based registration via qcom_clk_ref_probe(). This keeps the x1e80100 driver focused on clock metadata and reuses common runtime logic for regulator handling, enable/disable sequencing, and OF provider wiring. Link: https://lore.kernel.org/all/20260714-hamoa_tcsr_qref_0714_2-v1-2-13047922a376@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
The QREF block supplies reference clocks to PCIe PHYs and requires dedicated LDO supplies to operate. The digital control interface for QREF (clkref_en registers) resides in TCSR on glymur. Since QREF has no dedicated DT node of its own, these supply properties are placed in the TCSR node which acts as the control interface for QREF. Add a dedicated binding file for qcom,glymur-tcsr and document the supply properties. As this binding will grow to cover more SoCs, mark the required supplies per compatible using an allOf/if/then conditional. Link: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-1-776f2811b7af@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Mahua shares the same QREF TX/RPT/RX component naming as Glymur, but has a different topology: a single QREF block fed by REFGEN4 only, rather than the two independent blocks fed by REFGEN3 and REFGEN4 on Glymur. Add qcom,mahua-tcsr compatible and document its required supply properties. Note that REFGEN4 is supplied by regulators vdda-refgen3-1p2 and vdda-refgen3-0p9 on Mahua. List: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-2-776f2811b7af@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
…PHY on Glymur The PCIe PHYs on Glymur require a reference voltage provided by REFGEN, which in turn is powered by two LDOs. Since there is no devicetree node for REFGEN, add the vdda-refgen0p9 and vdda-refgen1p2 supplies for each PCIe PHY node. Link: https://lore.kernel.org/all/20260623-phy_refgen-v2-3-4d15983bf91d@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
The TCSR clkref_en clocks gate the QREF block which provides reference clocks to the PCIe PHYs. Wire up the LDO supplies required by the QREF and refgen blocks on the CRD board. Link: https://lore.kernel.org/all/20260702-tcsr_qref_0702-v7-6-776f2811b7af@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Wire up the LDO supplies required by the QREF and refgen blocks on Purwa and Hamoa boards. Purwa's QREF topology is same as Hamoa's, so it reuses the same qcom,x1e80100-tcsr compatible and supply set rather than needing a dedicated one. Link: https://lore.kernel.org/linux-arm-msm/20260714-hamoa_tcsr_qref_0714_2-v1-3-13047922a376@oss.qualcomm.com/ Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
PR #869 — validate-patchPR: #869
Final Summary
|
PR #869 — checker-log-analyzerPR: #869
Detailed report: Full report
|
CRs-Fixed: 4625592