swap order for some ppc floating point that were backward #7898
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Pull request overview
This PR fixes a critical bug in PowerPC floating-point fused multiply-add/subtract instruction lifting. The operands for the multiply and add/subtract operations were swapped, causing incorrect decompilation results. The fix swaps operands 2 and 3 to match the PowerPC ISA specification where these instructions compute frD = frA * frC + frB (not frA * frB + frC).
Changes:
- Corrected operand order for all 8 fused multiply-add/subtract instruction variants (double and single precision)
- Changed multiply operation from using
oper1 * oper3tooper1 * oper2 - Changed add/subtract operation from using
oper2tooper3
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plafosse
approved these changes
Jan 20, 2026
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needs review from someone who knows the architecture better but fixes the reported bug in #7897