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- libraries/N32_Drivers: add ADC/DAC/I2C/SPI config headers for the h47x_48x, h49x and h7xx series, and extend the shared drivers (adc, dac, eth, gpio, hard_i2c, nand, qspi, sdram, spi, usart, wdt). - n32h487zgl7-evb / n32h497zgl7-evb: add board ports (femc_timing, phy_reset, usb_config) and update Kconfig, SConscript, rtconfig and the IAR/Keil project files. - n32h760zil7-stb: update Kconfig and rtconfig. - CI: register the three n32hxxx boards.
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📌 Code Review Assignment🏷️ Tag: workflowReviewers: @Rbb666 @kurisaW @supperthomas Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-09-14 17:38 CST)
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🟡 Changes recommended
Unresolved critical and moderate defects remain in shared drivers and board configurations.
Get a fresh assessment by requesting another Copilot review.
Pull request overview
This PR extends N32H47x/H49x/H7xx driver and BSP support for three evaluation boards, including board configuration and CI registration. Unresolved critical and moderate defects remain in shared I2C, NAND, QSPI, SDRAM, SPI, and board pin-configuration paths.
Changes:
- Adds series-specific peripheral, DMA, NAND, SPI, I2C, QSPI, and SDRAM support.
- Adds board ports, startup configuration, generated configs, and IDE project updates.
- Registers the boards in CI and the BSP capability matrix.
File summaries
| File | Summary |
|---|---|
tools/ci/toolchain_bsp.yml |
Registers the three BSPs with toolchain CI. |
tools/ci/bsp_detail.yml |
Adds BSP CI metadata. |
bsp/README.md |
Updates the BSP capability matrix. |
bsp/n32/n32hxxx/n32h760zil7-stb/rtconfig.h |
Updates H760 build configuration. |
bsp/n32/n32hxxx/n32h760zil7-stb/board/Kconfig |
Adds H760 board options. |
bsp/n32/n32hxxx/n32h760zil7-stb/board/Cube_Config/USER/src/n32h7xx_cfg.c |
Updates H7 startup GPIO configuration; optional peripheral pin muxing remains incomplete. |
bsp/n32/n32hxxx/n32h760zil7-stb/.config |
Updates generated H760 configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/rtconfig.h |
Updates H497 build configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/project.uvprojx |
Updates H497 Keil project. |
bsp/n32/n32hxxx/n32h497zgl7-evb/project.uvoptx |
Updates H497 Keil options. |
bsp/n32/n32hxxx/n32h497zgl7-evb/project.ewp |
Updates H497 IAR project. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/SConscript |
Adds H49 board definitions and port paths. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/ports/usb_config.h |
Adds USB configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/ports/SConscript |
Adds board port build sources. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/ports/phy_reset.c |
Adds Ethernet PHY reset handling. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/ports/femc_timing.h |
Declares FEMC timing configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/ports/femc_timing.c |
Implements FEMC timing configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/Kconfig |
Adds H497 board options. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/Cube_Config/USER/src/n32h49x_cfg.c |
Updates H49 startup configuration. |
bsp/n32/n32hxxx/n32h497zgl7-evb/board/board.h |
Updates H497 board declarations. |
bsp/n32/n32hxxx/n32h497zgl7-evb/.config |
Updates generated H497 configuration. |
bsp/n32/n32hxxx/n32h487zgl7-evb/rtconfig.h |
Updates H487 build configuration. |
bsp/n32/n32hxxx/n32h487zgl7-evb/project.uvprojx |
Updates H487 Keil project. |
bsp/n32/n32hxxx/n32h487zgl7-evb/project.uvoptx |
Updates H487 Keil options. |
bsp/n32/n32hxxx/n32h487zgl7-evb/project.ewp |
Updates H487 IAR project. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/SConscript |
Adds H487 board definitions and port paths. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/ports/usb_config.h |
Adds USB configuration. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/ports/SConscript |
Adds board port build sources. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/ports/phy_reset.c |
Adds Ethernet PHY reset handling. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/ports/femc_timing.h |
Declares FEMC timing configuration. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/ports/femc_timing.c |
Implements FEMC timing configuration. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/Kconfig |
Adds H487 board options. |
bsp/n32/n32hxxx/n32h487zgl7-evb/board/Cube_Config/USER/src/n32h47x_48x_cfg.c |
Updates H47 startup GPIO configuration; optional peripheral pin muxing remains incomplete. |
bsp/n32/n32hxxx/n32h487zgl7-evb/.config |
Updates generated H487 configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_wdt.c |
Extends watchdog support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_usart.h |
Updates USART driver declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_usart.c |
Extends USART and DMA support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_spi.h |
Updates SPI driver declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_sdram.c |
Extends SDRAM support; H49 selection has a compile-time type issue. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_qspi.h |
Updates QSPI declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_nand.c |
Adds NAND operations; OOB/ECC and 16-bit access paths have defects. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_hard_i2c.h |
Updates hardware I2C declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_gpio.h |
Updates GPIO declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_gpio.c |
Extends GPIO support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_eth.h |
Updates Ethernet declarations. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_eth.c |
Extends Ethernet support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_dac.c |
Extends DAC support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_config.h |
Updates shared driver configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_adc.c |
Extends ADC support. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h7xx/dma_config.h |
Adds H7 DMA configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h49x/spi_config.h |
Adds H49 SPI configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h49x/i2c_hard_config.h |
Adds H49 I2C configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h49x/dma_config.h |
Adds H49 DMA configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h49x/dac_config.h |
Adds H49 DAC configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h49x/adc_config.h |
Adds H49 ADC configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h47x_48x/spi_config.h |
Adds H47/H48 SPI configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h47x_48x/i2c_hard_config.h |
Adds H47/H48 I2C configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h47x_48x/dma_config.h |
Adds H47/H48 DMA configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h47x_48x/dac_config.h |
Adds H47/H48 DAC configuration. |
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/config/h47x_48x/adc_config.h |
Adds H47/H48 ADC configuration. |
.github/workflows/manual_trigger_scons_except_STM32_all.yml |
Adds the three BSPs to manual CI builds. |
Review details
Suppressed comments (7)
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_hard_i2c.c:1014
- [bug/错误]: TX DMA is left active on START failure / START 失败时 TX DMA 未清理
English: The transmit path has the same failure window as the receive path: DMA and interrupts are enabled before the synchronous address phase, but the error return only resets the state. A late DMA/ISR access can use the stale transfer buffer. Abort the transfer through n32_i2c_abort_transfer(i2c) before returning.
中文：发送路径存在与接收路径相同的失败窗口：同步地址阶段前已使能 DMA 和中断，但错误返回只重置状态，后续 DMA/ISR 仍可能访问过期的传输缓冲区。返回前应通过 n32_i2c_abort_transfer(i2c) 完整终止传输。
i2c->transfer.state = I2C_READY;
return start_ret;
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_hard_i2c.c:53
- [bug/错误]: H47/H49 frame modes cannot honor no-stop/repeated-start transfers / H47/H49 帧模式无法实现无停止/重复起始传输
English: All H47/H49 frame-mode constants are zero, and the completion path unconditionally asserts STOPGEN. As a result, RT_I2C_NO_START/RT_I2C_NO_STOP requests are terminated with a STOP instead of being continued; common register-write-then-read transactions cannot use a repeated START. Implement the controller's no-stop sequencing or reject these flags rather than silently changing the bus transaction.
中文：H47/H49 的所有帧模式常量都为 0，而完成路径无条件设置 STOPGEN。因此 RT_I2C_NO_START/RT_I2C_NO_STOP 请求会被 STOP 终止，常见的“写寄存器后读数据”事务无法使用重复起始。请实现控制器的无停止时序，或拒绝这些标志，不要静默改变总线事务。
#define I2C_RELOAD_MODE (0x00000000U)
#define I2C_FIRST_FRAME (0x00000000U)
#define I2C_FIRST_AND_NEXT_FRAME (0x00000000U)
#define I2C_LAST_FRAME (0x00000000U)
#define I2C_LAST_FRAME_NO_STOP (0x00000000U)
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_nand.c:736
- [bug/错误]: H4/H49 NAND writes omit the spare area / H4/H49 NAND 写入遗漏 spare 区
English: The H4/H49 write path ignores the spare buffer entirely. This violates the MTD NAND operation contract and prevents OOB/ECC data and bad-block markers from being persisted.
中文：H4/H49 写路径完全忽略 spare 缓冲区，违反 MTD NAND 操作契约，无法持久化 OOB/ECC 数据和坏块标记。
/* spare area write not implemented yet */
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_nand.c:275
- [bug/错误]: NAND ECC metadata conflicts with the disabled controller setting / NAND ECC 元数据与控制器禁用设置冲突
English: This initializes FEMC with EccEnable = FEMC_NAND_ECC_DISABLE, while the registration code later subtracts ECC_BYTES() and advertises only the remainder as oob_free. The filesystem will reserve/skip ECC bytes that the controller neither generates nor stores, so OOB offsets and metadata layout are wrong. Either enable and handle FEMC ECC consistently or report the actual usable OOB layout.
中文：这里将 FEMC 初始化为 EccEnable = FEMC_NAND_ECC_DISABLE，但注册代码随后仍减去 ECC_BYTES()，只把剩余空间声明为 oob_free。文件系统会跳过控制器既不生成也不存储的 ECC 字节，导致 OOB 偏移和元数据布局错误。请统一启用并处理 FEMC ECC，或报告实际可用的 OOB 布局。
nandInit.EccEnable = FEMC_NAND_ECC_DISABLE;
bsp/n32/n32hxxx/libraries/N32_Drivers/drivers/drv_qspi.c:647
- [operational_implications/运行影响]: H4 XSPI transmit completion has no timeout / H4 XSPI 发送完成没有超时
English: The H47x/H48x helper also spins forever on TXFE and BUSY, so a disconnected or wedged flash can permanently block every blocking QSPI operation. This path should use the message timeout and return an error so the driver can disable the peripheral and release the bus.
中文：H47x/H48x 辅助函数同样会无限等待 TXFE 和 BUSY；当 Flash 未连接或控制器卡死时，所有阻塞式 QSPI 操作都会永久阻塞。此路径应使用消息超时并返回错误，以便驱动关闭外设并释放总线。
static void xspi_wait_tx_complete(void)
{
while (XSPI_GetFlagStatus(XSPI_STS_TXFE) != SET) /* TX FIFO empty */
{
}
while (XSPI_GetFlagStatus(XSPI_STS_BUSY) != RESET) /* transfer done */
{
}
bsp/n32/n32hxxx/n32h487zgl7-evb/board/Cube_Config/USER/src/n32h47x_48x_cfg.c:188
- [bug/错误]: Optional peripheral pin muxing is missing / 可选外设引脚复用配置缺失
English: The board startup GPIO routine configures only USART1, while the new integration exposes Ethernet, NAND, and QSPI drivers. Those drivers do not configure their AF pins themselves, so enabling any of them leaves the peripheral pins in their reset function and the device cannot operate. Add the schematic-correct pin/clock configuration for each enabled peripheral or gate the options until it exists.
中文：该板启动 GPIO 例程只配置了 USART1，但本 PR 新增集成暴露了 Ethernet、NAND 和 QSPI 驱动。这些驱动不会自行配置 AF 引脚，因此启用任一外设后引脚仍处于复位复用功能，设备无法工作。应为每个启用的外设补充符合原理图的引脚/时钟配置，或在实现前限制这些选项。
bsp/n32/n32hxxx/n32h760zil7-stb/board/Cube_Config/USER/src/n32h7xx_cfg.c:202
- [bug/错误]: Optional peripheral pin muxing is missing / 可选外设引脚复用配置缺失
English: This startup GPIO routine configures only USART1, while the board Kconfig exposes Ethernet, SDRAM, NAND, and QSPI. Their drivers do not configure the required AF pins, so selecting any of these options leaves the hardware disconnected despite successful driver initialization. Add the schematic-correct pin/clock setup for each peripheral or gate the options until it exists.
中文：该启动 GPIO 例程只配置了 USART1，但板级 Kconfig 暴露了 Ethernet、SDRAM、NAND 和 QSPI。驱动不会配置所需 AF 引脚，因此选择这些选项后即使驱动初始化成功，硬件仍未连接。应为每个外设补充符合原理图的引脚/时钟设置，或在实现前限制这些选项。
- Files reviewed: 65/69 changed files
- Comments generated: 12
- Review effort level: Lite
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Reply to the comments folded into the review summary (7)Copilot kept these out of the inline view, so they are answered here rather than in a thread. Line references are to the parent commit Fixed in 529c702
Not addressed here, and pre-existing
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- qspi: both XSPI variants poll the status flags with no bound, so an unresponsive bus hangs the caller and silently defeats the timeout it passed in. Route every wait through the timeout-carrying helpers, return -RT_ETIMEOUT and disable the controller on failure, and replace the "poll then send" loops with one bounded wait per element. - hard_i2c: the interrupt receive path programs the BYTENUM window once and never reloads it, so a longer message was truncated and still reported as success; refuse it with -RT_EINVAL (enable RX DMA for longer reads) instead of capping XferSize. Stop capping the transmit byte count at the window size as well: BYTENUM counts received bytes only, and the cap stopped feeding DAT after byte 255 while TXDATE stayed asserted. Reject RT_I2C_NO_START/RT_I2C_NO_STOP on the series without frame chaining, where they would silently become a fresh START and a STOP, and tear the DMA channel down when the address phase times out instead of leaving it armed against a buffer about to unwind. - spi: the H7xx LLI chain advanced the memory side by SPI_DMA_BLOCK_MAX bytes although BlkTfrSize counts elements, so a 16-bit transfer walked half a word early per node; advance by elements and scale both the chunk offset and the staging buffer by the data width. Propagate the DMA arm failure that was ignored. - nand: an odd data length has no halfword-only encoding on the 16-bit bus and padding would program a byte the caller never asked for, so refuse it before the command phase; issue the empty-page dummy store as a halfword there too, where 8-bit AHB writes are unsupported. - Kconfig: gate the Ethernet/SDRAM/LCD/QSPI/NAND options behind BSP_PERIPH_PIN_CFG_READY on all three boards. The peripheral clock and IO are not configured for these boards yet, so selecting one of them builds a driver whose pins stay in the reset function.
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Correction to my earlier replies on the I2C DMA timeout threads. I described widening
An H7xx abort therefore needs its own implementation written against that register set, not a change to the What the It is not reachable in this tree. Given that, I would rather not grow this PR with a second implementation that cannot be built or tested here. The fix belongs with the first H7xx board that enables I2C, where it can be verified against hardware. Noting it here so the limitation is explicit rather than left implied by the macro's fallback. |
drv_sdram.c includes <sdram_port.h> unconditionally under BSP_USING_SDRAM, and n32h497zgl7-evb had no such header, so the option could not build at all. Add one for the M12L64164A fitted on this board: 4 banks x 1M x 16 bits = 8 MB, 12 row address bits, 8 column address bits, SDRAM1 mapped at 0x98000000. The timing values are the ones validated on this board in hardware. Three of the Kconfig defaults described a different part: BSP_SDRAM_DATA_WIDTH_SEL default 32 -> 16 BSP_SDRAM_COLUMN_BITS_SEL default 9 -> 8 BSP_SDRAM_SIZE default 32 -> 8 BANK1, ROW_BIT_12 and CAS_LATENCY_3 already matched and are unchanged. Verified by building n32h497zgl7-evb with BSP_PERIPH_PIN_CFG_READY and BSP_USING_SDRAM enabled: drv_sdram.c and the SDK's n32h49x_sdram.c compile and link with no warnings.
…eader The N32H7xx branch of drv_hard_i2c.c had never been compiled. The file takes its peripheral declarations from board.h, and only n32h497zgl7-evb includes n32h49x_i2c.h, so on H7xx every I2C symbol was undefined and the option could not build at all. Include the peripheral header from the driver itself, the way drv_sdram.c already does. I2C_ABORT_ON_TIMEOUT also degraded to a bare `state = I2C_READY` on H7xx, at the four rt_completion_wait() timeouts in n32_i2c_master_xfer(). The H49x implementation is written against the older IP - I2C_ClrIntPendingBit, I2C_STS2_BUSY, I2C_CTRL1_STOPGEN - none of which exist in the H7xx SDK, so give H7xx its own teardown. It disables the interrupt and DMA request sources, disables the DMA channel that would otherwise stay armed against the caller's buffer, releases the bus and clears the status residue. Only flags with a matching INTCLR bit may be passed to I2C_ClrFlag(), which is a plain "INTCLR |= flag" write; TFC (0x40) and BUSY (0x8000) have none. I2C_Configuration() was called from n32_i2c_init() but defined nowhere in the tree. It is a board hook for pin mux, which is not the driver's job - the H49x path configures no pins either - so drop the call. Verified by building n32h760zil7-stb with BSP_USING_HARD_I2C1 and its TX/RX DMA enabled, which now compiles and links with no warnings, and n32h497zgl7-evb with I2C1/I2C2 DMA enabled, whose image size is unchanged. Neither board routes I2C pins yet, so this is build-verified only, not hardware-verified.
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Follow-up to the above: the H7xx fix is now in this PR, in I gave two reasons for leaving it out. One of them was wrong, and not in the direction I expected. It cannot be built here. True, but not for the reason I assumed. It was not merely that no board enables the option — the H7xx half of It cannot be tested here. Still true, and still the limitation worth carrying forward. Neither The helper is written against the register set described above, and |
这个 PR 做了什么
在
bsp/n32/n32hxxx下扩展 N32H47x_48x / N32H49x / N32H7xx 三系列的驱动支持，覆盖n32h487zgl7-evb、n32h497zgl7-evb、n32h760zil7-stb三块板。libraries/N32_Drivers/—— 三块板共用（29 个文件）h47x_48x、h49x、h7xx三个系列drv_adc.c、drv_dac.c、drv_eth.c/h、drv_gpio.c/h、drv_hard_i2c.c/h、drv_nand.c、drv_qspi.c/h、drv_sdram.c、drv_spi.c/h、drv_usart.c/h、drv_wdt.c，各自补上对应SOC_SERIES_*的分支n32h487zgl7-evb/n32h497zgl7-evb（14 + 15 个文件）board/ports/：femc_timing.c/h（FEMC 时序表）、phy_reset.c（ETH PHY 复位）、usb_config.h（CherryUSB 配置头）board/Kconfig、board/SConscript、board/ports/SConscript、board/board.h、rtconfig.h、.config与 IAR/Keil 工程文件board/SConscript补上ports包含路径和N32H49X器件宏，与 IAR 工程的定义保持一致n32h760zil7-stb（7 个文件） —— 更新board/Kconfig、rtconfig.h、.config与 Keil 工程文件CI（3 个文件） —— 把三块板补进
.github/workflows/manual_trigger_scons_except_STM32_all.yml、tools/ci/bsp_detail.yml、tools/ci/toolchain_bsp.yml（.github/ALL_BSP_COMPILE.json中已有）；bsp/README.md同步 BSP 矩阵行自检
tools/ci/clang_format_check.py通过：38 PASS / 0 FAIL）#if 0和已注释代码.github/ALL_BSP_COMPILE.json中登记范围说明
本 PR 只含 BSP 侧改动，不含
components/drivers/usb/cherryusb的任何提交 —— 该适配在 #11764。🤖 Generated with Claude Code