diff --git a/docs/user/FlowVariables.md b/docs/user/FlowVariables.md
index 80d3073bc5..47eadea8d0 100644
--- a/docs/user/FlowVariables.md
+++ b/docs/user/FlowVariables.md
@@ -140,6 +140,7 @@ configuration file.
| DISABLE_VIA_GEN| Passed as -disable_via_gen to detailed_route.| |
| DONT_BUFFER_PORTS| Do not buffer input/output ports during floorplanning.| 0|
| DONT_USE_CELLS| Dont use cells eases pin access in detailed routing.| |
+| DPL_USE_OLD_DIAMOND| Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.| 0|
| DPO_MAX_DISPLACEMENT| Specifies how far an instance can be moved when optimizing.| 5 1|
| EARLY_SIZING_CAP_RATIO| Ratio between the input pin capacitance and the output pin load during initial gate sizing.| |
| ENABLE_DPO| Enable detail placement with improve_placement feature.| 1|
@@ -321,7 +322,6 @@ configuration file.
| TNS_END_PERCENT| Default TNS_END_PERCENT value for post CTS timing repair. Try fixing all violating endpoints by default (reduce to 5% for runtime). Specifies how many percent of violating paths to fix [0-100]. Worst path will always be fixed.| 100|
| UNSET_ABC9_BOX_CELLS| List of cells to unset the abc9_box attribute on| |
| USE_FILL| Whether to perform metal density filling.| 0|
-| USE_NEGOTIATION| Enable using negotiation legalizer for detailed placement.| 0|
| VERILOG_DEFINES| Preprocessor defines passed to the language frontend. Example: `-D HPDCACHE_ASSERT_OFF`| |
| VERILOG_FILES| The path to the design Verilog/SystemVerilog files providing a description of modules.| |
| VERILOG_INCLUDE_DIRS| Specifies the include directories for the Verilog input files.| |
@@ -462,6 +462,7 @@ configuration file.
- [CLUSTER_FLOPS_ARGS](#CLUSTER_FLOPS_ARGS)
- [DETAIL_PLACEMENT_ARGS](#DETAIL_PLACEMENT_ARGS)
- [DONT_BUFFER_PORTS](#DONT_BUFFER_PORTS)
+- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [EARLY_SIZING_CAP_RATIO](#EARLY_SIZING_CAP_RATIO)
- [FLOORPLAN_DEF](#FLOORPLAN_DEF)
- [GLOBAL_PLACEMENT_ARGS](#GLOBAL_PLACEMENT_ARGS)
@@ -507,6 +508,7 @@ configuration file.
- [CTS_SNAPSHOT](#CTS_SNAPSHOT)
- [CTS_SNAPSHOTS](#CTS_SNAPSHOTS)
- [DETAILED_METRICS](#DETAILED_METRICS)
+- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
- [LEC_AUX_VERILOG_FILES](#LEC_AUX_VERILOG_FILES)
- [LEC_CHECK](#LEC_CHECK)
@@ -531,6 +533,7 @@ configuration file.
- [CELL_PAD_IN_SITES_DETAIL_PLACEMENT](#CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
- [DETAILED_METRICS](#DETAILED_METRICS)
+- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [ENABLE_RESISTANCE_AWARE](#ENABLE_RESISTANCE_AWARE)
- [GLOBAL_ROUTE_ARGS](#GLOBAL_ROUTE_ARGS)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
@@ -660,5 +663,4 @@ configuration file.
- [TAP_CELL_NAME](#TAP_CELL_NAME)
- [TECH_LEF](#TECH_LEF)
- [USE_FILL](#USE_FILL)
-- [USE_NEGOTIATION](#USE_NEGOTIATION)
diff --git a/flow/scripts/cts.tcl b/flow/scripts/cts.tcl
index f079bb5f10..fc835c4de1 100644
--- a/flow/scripts/cts.tcl
+++ b/flow/scripts/cts.tcl
@@ -47,7 +47,7 @@ set_placement_padding -global \
-right $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
set dpl_args {}
-append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
+append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
set result [catch { log_cmd detailed_placement {*}$dpl_args } msg]
if { $result != 0 } {
save_progress 4_1_error
diff --git a/flow/scripts/detail_place.tcl b/flow/scripts/detail_place.tcl
index 0e7c3b9794..0fdff2b0b0 100644
--- a/flow/scripts/detail_place.tcl
+++ b/flow/scripts/detail_place.tcl
@@ -16,7 +16,7 @@ proc do_dpl { } {
-left $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT) \
-right $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
set dpl_args [env_var_or_empty DETAIL_PLACEMENT_ARGS]
- append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
+ append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
log_cmd detailed_placement {*}$dpl_args
if { $::env(ENABLE_DPO) } {
diff --git a/flow/scripts/global_route.tcl b/flow/scripts/global_route.tcl
index 3534fde65f..3a67030690 100644
--- a/flow/scripts/global_route.tcl
+++ b/flow/scripts/global_route.tcl
@@ -62,7 +62,7 @@ proc global_route_helper { } {
# Running DPL to fix overlapped instances
# Run to get modified net by DPL
set dpl_args {}
- append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
+ append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
log_cmd global_route -start_incremental
log_cmd detailed_placement {*}$dpl_args
# Route only the modified net by DPL
diff --git a/flow/scripts/variables.json b/flow/scripts/variables.json
index 0c8e56ad77..971e569b7b 100644
--- a/flow/scripts/variables.json
+++ b/flow/scripts/variables.json
@@ -306,6 +306,15 @@
"DONT_USE_CELLS": {
"description": "Dont use cells eases pin access in detailed routing.\n"
},
+ "DPL_USE_OLD_DIAMOND": {
+ "default": 0,
+ "description": "Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.\n",
+ "stages": [
+ "place",
+ "cts",
+ "grt"
+ ]
+ },
"DPO_MAX_DISPLACEMENT": {
"default": "5 1",
"description": "Specifies how far an instance can be moved when optimizing.\n"
@@ -1430,10 +1439,6 @@
"default": 0,
"description": "Whether to perform metal density filling.\n"
},
- "USE_NEGOTIATION": {
- "default": 0,
- "description": "Enable using negotiation legalizer for detailed placement.\n"
- },
"VERILOG_DEFINES": {
"description": "Preprocessor defines passed to the language frontend. Example: `-D HPDCACHE_ASSERT_OFF`\n",
"stages": [
diff --git a/flow/scripts/variables.yaml b/flow/scripts/variables.yaml
index c8cbfb7898..e9f3bdbf03 100644
--- a/flow/scripts/variables.yaml
+++ b/flow/scripts/variables.yaml
@@ -622,10 +622,14 @@ DPO_MAX_DISPLACEMENT:
description: |
Specifies how far an instance can be moved when optimizing.
default: 5 1
-USE_NEGOTIATION:
+DPL_USE_OLD_DIAMOND:
description: |
- Enable using negotiation legalizer for detailed placement.
+ Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.
default: 0
+ stages:
+ - place
+ - cts
+ - grt
GPL_TIMING_DRIVEN:
description: |
Specifies whether the placer should use timing driven placement.
diff --git a/tools/OpenROAD b/tools/OpenROAD
index 08f67ee5ec..7d0e516c6f 160000
--- a/tools/OpenROAD
+++ b/tools/OpenROAD
@@ -1 +1 @@
-Subproject commit 08f67ee5ecd14db5a42be8c610bbfd1ccf079299
+Subproject commit 7d0e516c6fb4deba09553c7d634b812122c664ae